ASP-DAC 2027 — 32nd Asia and South Pacific Design Automation Conference
by ASP-DAC (ACM SIGDA, IEEE CEDA and IEICE ESS)
Asia-Pacific's largest EDA and VLSI design automation conference, Tokyo, January 2027.
About This Event
ASP-DAC 2027, the 32nd Asia and South Pacific Design Automation Conference, runs 25–28 January 2027 at Hitotsubashi Hall in the National Center of Sciences Building, Tokyo, Japan. Running since 1995, it is the largest conference on electronic design automation for VLSI and systems in the Asia and South Pacific regions, and the regional counterpart to DAC and DATE. Its programme covers machine learning applied to design automation as well as the circuit and architecture work behind AI accelerators, alongside a Designers' Forum for practitioners and a University LSI Design Contest that showcases fabricated student chips with real measurement data. The 2027 submission calendar is published: abstracts were due 3 July 2026 and papers 10 July 2026, with the University LSI Design Contest accepting submissions until 15 August 2026, notifications on 16 September 2026 and camera-ready copy due 6 November 2026.
Key Dates & Deadlines
- University LSI Design Contest paper submission deadline
- University LSI Design Contest acceptance notification
- Camera-ready deadline
At a Glance
- Date
- January 25–28, 2027
- Location
- Hitotsubashi Hall, National Center of Sciences Building, Tokyo, Japan
- Format
- In-Person
- Event Type
- Conference
- Status
- Upcoming
- Pricing
- Paid
- Organizer
- ASP-DAC (ACM SIGDA, IEEE CEDA and IEICE ESS)
- Added
- Aug 10, 2026
- Updated
- Aug 10, 2026
Topics & Focus Areas
Who Should Attend
- ✓VLSI and chip design engineers
- ✓EDA researchers and tool developers
- ✓AI accelerator and SoC architects
- ✓Engineering managers at Asia-Pacific semiconductor companies
- ✓University researchers and PhD students in design automation
- ✓Embedded systems and low-power design engineers
Why Attend
For an engineering leader running silicon or embedded design out of Asia-Pacific, ASP-DAC is the one regional week that covers both halves of the AI hardware problem: the machine learning now embedded in the design and verification flow, and the circuits that make inference cheap enough to deploy at the edge. It is also the most efficient recruiting venue in the region — the University LSI Design Contest surfaces students who have taped out real silicon and measured it, which is a far stronger signal than a simulation-only portfolio. Expect to leave with a concrete read on regional tooling maturity, supplier capability and the hiring pipeline for the next two design cycles.
Event Features
- ✓Peer-reviewed technical programme on design automation and VLSI design
- ✓Machine learning and AI tracks covering both AI-assisted design and AI hardware
- ✓Designers' Forum — industrial case-study programme for practising engineers
- ✓University LSI Design Contest for fabricated chips and FPGAs with measurement data, judged across analog/RF/mixed-signal, DSP, microprocessors and custom ASIC
- ✓Tutorials and special sessions
- ✓Awards for outstanding student designs
- ✓32nd edition, Hitotsubashi Hall, Tokyo, 25–28 January 2027
What Makes This Unique
- ★The largest design-automation conference in Asia and the South Pacific, running continuously since 1995 — for regional chip teams it is the domestic alternative to flying to DAC in California or DATE in Europe.
- ★The University LSI Design Contest is unusual in requiring fabricated chips or FPGAs with actual measurement data rather than simulation, which makes it a genuine recruiting shortlist of hands-on silicon talent.
- ★The Designers' Forum runs a practitioner programme in parallel with the research track, so working engineers get industrial case studies rather than only peer-reviewed papers.
- ★Held in central Tokyo at Hitotsubashi Hall in late January, a quiet point in the semiconductor conference calendar that does not collide with DAC, DATE or ISSCC's main programme.
- ★The full submission and notification calendar through camera-ready on 6 November 2026 is already published, which is rare this far ahead for a regional conference.
Industries Represented
Pricing Details
ASP-DAC 2027 registration rates are not published on the conference site yet — as of the site's last update the 2027 pages carry the dates, venue and submission calendar only. ASP-DAC normally opens registration a few months before the conference with IEEE/ACM/IEICE member, non-member and student tiers, but there are no 2027 figures to quote.
Organizer
ASP-DAC (ACM SIGDA, IEEE CEDA and IEICE ESS)
aspdac.com/Frequently Asked
- When is ASP-DAC 2027?
- ASP-DAC 2027 takes place January 25–28, 2027 in Tokyo, Japan.
- Where is ASP-DAC 2027 held?
- ASP-DAC 2027 is held in Tokyo, Japan. The event format is in-person.
- What is the ASP-DAC 2027 submission deadline?
- The next ASP-DAC 2027 deadline is university lsi design contest paper submission deadline on Aug 15, 2026. Remaining dates: University LSI Design Contest acceptance notification — Sep 16, 2026; Camera-ready deadline — Nov 6, 2026.
- How much does ASP-DAC 2027 cost?
- ASP-DAC 2027 is paid. ASP-DAC 2027 registration rates are not published on the conference site yet — as of the site's last update the 2027 pages carry the dates, venue and submission calendar only. ASP-DAC normally opens registration a few months before the conference with IEEE/ACM/IEICE member, non-member and student tiers, but there are no 2027 figures to quote.
- Who should attend ASP-DAC 2027?
- ASP-DAC 2027 is aimed at VLSI and chip design engineers, EDA researchers and tool developers, AI accelerator and SoC architects, Engineering managers at Asia-Pacific semiconductor companies, University researchers and PhD students in design automation, Embedded systems and low-power design engineers.
- What topics does ASP-DAC 2027 cover?
- ASP-DAC 2027 covers Electronic design automation, Machine learning for design automation, VLSI and LSI design, AI accelerator and processor architecture, Analog, RF and mixed-signal circuits, Digital signal processing, Low-power and embedded systems design, Custom ASIC design.
Sources
This page was written from 4 sources, 2 on domains other than aspdac.com.
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