DAC 2027 — 64th Design Automation Conference

DAC 2027, the 64th Design Automation Conference, runs 11–14 July 2027 at the San Jose Convention Center in San Jose, California. Billed as the Chips to Systems Conference and sponsored by ACM SIGDA and IEEE CEDA, DAC is the industry's main meeting point for electronic design automation, and its programme is now organised around five themes — AI, Design, EDA, Security and Systems — which reflects how far machine learning has moved into the design flow itself. Two distinct AI conversations run in parallel here: using AI and large language models to automate chip design and verification, and designing the silicon that runs AI workloads. DAC pairs a peer-reviewed research track with an Engineering Track aimed at practising designers, Sunday workshops and tutorials, and a large exhibition of EDA and IP vendors. The 2027 call for papers and registration rates have not opened yet.

Date

July 11–14, 2027

Location

San Jose Convention Center, California

Format

In-Person

Event Type

Conference

Status

Upcoming

Pricing

Paid (Free tier available)

Organizer

Design Automation Conference (ACM SIGDA and IEEE CEDA)

Added

Aug 10, 2026

Updated

Aug 10, 2026

• ✓Chip design and verification engineers
• ✓EDA tool developers and researchers
• ✓VPs of Engineering and CTOs at semiconductor and IP companies
• ✓AI hardware and accelerator architects
• ✓Hardware security engineers
• ✓Academic researchers and PhD students in design automation
• ✓Semiconductor procurement and technology strategy leads

DAC is the week to send a chip or platform engineering lead if your roadmap depends on custom silicon, an ASIC partner or an EDA tool renewal. The AI theme now runs in both directions — how large language models are changing verification and place-and-route productivity, and how accelerator architectures are evolving to run inference cheaply — and both feed directly into headcount and licensing decisions. A VP of Engineering leaves with a like-for-like read on which EDA vendors have real AI capability versus rebranded automation, what design-cycle time is achievable next year, and which university groups are producing the verification talent the whole industry is short of.

• ✓Research track: peer-reviewed papers across design automation and system design
• ✓Engineering Track aimed at practising chip designers and verification engineers
• ✓Five programme themes: AI, Design, EDA, Security and Systems
• ✓Sunday workshops and tutorials as a separately ticketed day
• ✓Exhibition floor with EDA, IP and semiconductor tooling vendors
• ✓Keynotes from semiconductor and systems industry leaders
• ✓Networking receptions and poster sessions included with the full conference pass
• ✓64th edition, San Jose Convention Center, 11–14 July 2027

• ★The programme is explicitly built around five themes — AI, Design, EDA, Security and Systems — so AI is a first-class track rather than a keynote flourish, covering both AI-for-design and design-for-AI.
• ★The Engineering Track sits alongside the peer-reviewed research track, which means practising designers get a programme written for them at a fraction of the full-conference price.
• ★It is the EDA industry's single largest exhibition: the tool and IP vendors a design team already depends on all demo at the same show, in the same week.
• ★Sponsored jointly by ACM SIGDA and IEEE CEDA, so the research track carries genuine academic weight rather than being a vendor showcase with papers attached.
• ★Returns to the San Jose Convention Center in the middle of Silicon Valley, which makes day-attendance realistic for most Bay Area chip teams and keeps travel cost near zero.

DAC 2027 rates are not published yet. For reference, DAC 2026 charged $1,239 advance / $1,449 onsite for an ACM or IEEE member full-conference pass and $1,449 / $1,649 for non-members; student full-conference passes were $719 member / $929 non-member advance. The Engineering Track was $359 advance and $419 late, a Sunday workshop/tutorial-only pass was $249, and the "I Love DAC" exhibits-only pass — which includes the exhibit hall, keynotes and daily receptions — was free. Advance registration for 2026 ran 10 February to 26 June, so expect a similar early-bird window for 2027.

When is DAC 2027?

DAC 2027 takes place July 11–14, 2027 in San Jose, California.

Where is DAC 2027 held?

DAC 2027 is held in San Jose, California. The event format is in-person.

How much does DAC 2027 cost?

DAC 2027 is paid, with a free tier available. DAC 2027 rates are not published yet. For reference, DAC 2026 charged $1,239 advance / $1,449 onsite for an ACM or IEEE member full-conference pass and $1,449 / $1,649 for non-members; student full-conference passes were $719 member / $929 non-member advance. The Engineering Track was $359 advance and $419 late, a Sunday workshop/tutorial-only pass was $249, and the "I Love DAC" exhibits-only pass — which includes the exhibit hall, keynotes and daily receptions — was free. Advance registration for 2026 ran 10 February to 26 June, so expect a similar early-bird window for 2027.

Who should attend DAC 2027?

DAC 2027 is aimed at Chip design and verification engineers, EDA tool developers and researchers, VPs of Engineering and CTOs at semiconductor and IP companies, AI hardware and accelerator architects, Hardware security engineers, Academic researchers and PhD students in design automation, Semiconductor procurement and technology strategy leads.

What topics does DAC 2027 cover?

DAC 2027 covers AI and machine learning for chip design, Electronic design automation, AI accelerator and SoC architecture, Hardware security, Verification and validation, Systems design and integration, Large language models for EDA, Semiconductors.

This page was written from 4 sources, 2 on domains other than dac.com.

1. 1.dac.com — dac.comvendor
2. 2.archive.dac.com — future dac dates
3. 3.dac.com — registration informationvendor
4. 4.getpaperpilot.com — dac 2027