Agentrys
by Agentrys
Agentic design automation that lets chip teams build and own a self-improving engineering workforce
Agentrys builds Agentrys Studio, a platform for semiconductor teams to create, deploy, evaluate and continuously improve AI agents that automate chip design workflows such as functional verification and physical design. It is aimed at silicon engineering leaders at fabless chipmakers, foundries and AI-silicon startups who want agents trained on their own design data, running on-premise behind their firewall rather than a closed AI feature bolted onto an incumbent EDA tool.
Agentrys is a San Jose, California company, with additional offices in Austin and Taiwan, building what it calls Agentic Design Automation (ADA) for the semiconductor industry. Its product, Agentrys Studio, is an open platform on which chip teams build, deploy, evaluate and continuously improve an agentic engineering workforce that automates entire design workflows rather than individual tasks. The company emerged publicly on 26 August 2026 with $24.5 million in total funding: an oversubscribed $19.1 million seed led by Etna Labs, following a $5.4 million pre-seed led by the MediaTek Innovation Fund, its first strategic backer. Founder and CEO Mark Ren previously served as Director of Design Automation Research at NVIDIA, where he led ChipNeMo, the first industrial large language model for chip design, and brings close to three decades of EDA and AI R&D from IBM Research and NVIDIA; the team includes engineers from NVIDIA, Meta, AMD, Samsung, Google and Siemens. Technically the platform rests on three ideas: agent-native tooling that exposes machine-actionable APIs designed for agents rather than human-facing EDA interfaces; a Self-Evolve framework that improves agents through grounded engineering evaluation against customer-defined criteria and the customer's own design data; and cross-vendor orchestration across heterogeneous commercial and open-source EDA tools instead of assuming single-vendor lock-in. Proven agents are promoted into an organisation-wide registry. Deployment is on-premise or private cloud, behind the customer firewall, which the company treats as non-negotiable for design IP protection. Agentrys reports exceeding 90% accuracy on NVIDIA's public CVDP verification benchmark, including roughly 95% on checker and assertion generation, and an autonomous multi-agent workflow that took a 32-bit CPU from specification to sign-off-clean GDS layout without human intervention. It is engaged with several top fabless semiconductor companies, a leading global foundry and multiple chip startups across digital and analog flows, with physical implementation, RTL, analog and system design on the roadmap.
The VP of engineering or design-methodology lead at a fabless chipmaker or AI-silicon startup who wants verification and physical-design agents trained on proprietary flows, kept on-premise, and not tied to one EDA vendor's roadmap.
An agent workforce that runs the team's own EDA flows behind the firewall and measurably improves with every design iteration instead of plateauing at an off-the-shelf baseline.
At a Glance
- Category
- Agent Development
- Pricing
- Contact for pricing
- Target Market
- CTOs, VPs of Engineering, Design Methodology Leads, Verification Engineers, Semiconductor Executives
- Deployment
- Self-hosted
- Headquarters
- San Jose, United States
- Customers
- Several top fabless semiconductor companies, a leading global foundry and multiple chip startups; names undisclosed
Key Features
- ✓Agentrys Studio
Build, deploy, evaluate and version multi-agent engineering workflows instead of hand-wiring one-off scripts per project.
- ✓Agent-native tooling
Machine-actionable APIs over EDA tools designed for agent consumption rather than the human-facing interfaces incumbents expose.
- ✓Self-Evolve framework
Agents improve continuously through grounded engineering evaluation against customer-defined success criteria on real design data.
- ✓Cross-vendor orchestration
Drives heterogeneous commercial and open-source EDA tools so no single-vendor flow is assumed or required.
- ✓Organisation-wide agent registry
Agents that prove themselves on real designs are promoted so other teams reuse them rather than rebuilding from scratch.
- ✓On-premise deployment
Runs behind the customer firewall or in private cloud so proprietary RTL and process design kits never leave the perimeter.
Capabilities
Use Cases
- •Verification throughput
Generate testbench stimulus, checkers and assertions automatically so verification engineers review rather than author the bulk of the work.
- •Spec-to-GDS automation
Run an autonomous multi-agent workflow from design specification through to a sign-off-clean layout with minimal human intervention.
- •Methodology capture
Encode a team's accumulated design methodology into agents so expertise survives attrition and transfers between projects.
- •Scaling a lean silicon team
Let an AI-silicon startup take on more tape-outs without hiring a proportional number of senior verification and physical design engineers.
- •Toolchain-neutral automation
Add agentic automation across a mixed EDA estate without committing to one vendor's proprietary AI roadmap.
Ideal For
Best For
- ✓Automating functional verification work such as testbench stimulus, checker and assertion generation
- ✓Building proprietary design agents on a team's own methodology and historical design data
- ✓Orchestrating agents across a mixed Synopsys, Cadence, Siemens and open-source EDA toolchain
- ✓Scaling a small AI-silicon startup design team without proportionally scaling headcount
- ✓Keeping RTL, PDKs and design IP on-premise while still applying frontier AI to the flow
Not Ideal For
- ✗Buyers who need published customer references, cycle-time or defect-escape numbers before purchase — independent analysis notes none of that is in the public record yet
- ✗Teams whose bottleneck is physical implementation, analog or system design today, since those flows are roadmap or early engagement rather than the platform's proven strength
- ✗Organisations without in-house design-methodology expertise, because the platform explicitly expects the customer to bring the workflows, tools and data that create the advantage
- ✗Anyone wanting a SaaS trial — there is no self-serve entry point, only a direct on-premise enterprise engagement
Deployment
Market & Ratings
Several top fabless semiconductor companies, a leading global foundry and multiple chip startups; names undisclosed
Market Analysis
Pros
- ✓Unusual founder credibility: Mark Ren led ChipNeMo at NVIDIA Research and has close to three decades of EDA and AI R&D at IBM and NVIDIA
- ✓Results are reported against a public third-party benchmark — over 90% on NVIDIA's CVDP verification benchmark, with roughly 95% on checker and assertion generation
- ✓On-premise deployment addresses the single biggest blocker to semiconductor AI adoption, since design IP and PDKs never leave the customer perimeter
- ✓Cross-vendor by design, so it does not force a rip-and-replace of an existing Synopsys, Cadence or Siemens flow
- ✓MediaTek's strategic pre-seed investment gives the company a credible industry anchor early
Cons
- ✗Independent analysis notes there are no named customer case studies, commercial terms, expert-led baselines, cycle-time reductions, engineering-hour savings, defect-escape rates or final-silicon outcomes in the public record
- ✗The headline spec-to-GDS demonstration used open-source components and a predictive library, not commercial EDA tools or a production PDK, so it does not establish performance on proprietary designs or larger chips
- ✗Operational questions are publicly unanswered — customer data governance, version control, reproducibility through sign-off, how often engineers must intervene, and failure recovery
- ✗Proven strength is functional verification; physical implementation, RTL, analog and system design are roadmap items or early customer engagements
- ✗No G2, Capterra, TrustRadius, Product Hunt, Hacker News or Reddit presence at all, so there is zero independent practitioner feedback to read
- ✗The CEO himself concedes that off-the-shelf frontier AI raises the industry baseline without conferring advantage, meaning the customer must supply the proprietary methodology and data that create the return
Pricing
Enterprise engagement
Contact for pricing
- ✓On-premise or private-cloud deployment behind the customer firewall
- ✓Onboard / Evolve / Scale engagement model
- ✓Integration with existing commercial and open-source EDA tools
- ✓Organisation-wide agent registry
No list pricing is published anywhere and independent coverage explicitly notes that no commercial terms have been disclosed. Agentrys sells through a direct enterprise engagement that starts by scoping one high-value workflow with measurable targets before expanding, and deployment is on-premise or private cloud, so the real cost also includes the compute and the commercial EDA tool licences the agents drive.
Security & Compliance
Sources
This page was written from 5 sources, 4 on domains other than agentrys.ai.
- 1.agentrys.ai — agentrys.aivendor
- 2.semiconductor-digest.com — agentrys raises 24 5 million to build agentic design automat
- 3.semiwiki.com — 371148 ceo interview with mark ren of agentrys
- 4.quasa.io — agentrys raises 24 5m chip design agents must still prove th
- 5.finance.yahoo.com — agentrys raises 24 5 million 140000815
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