ISSCC 2027 — IEEE International Solid-State Circuits Conference

ISSCC 2027, the IEEE International Solid-State Circuits Conference, runs Sunday to Thursday, 14–18 February 2027 at the San Francisco Marriott Marquis in San Francisco, California. Known in the industry as the "Chip Olympics", ISSCC is where the silicon behind AI is first disclosed in measured detail — AI accelerators, high-bandwidth memory, power delivery, wireline and optical interconnect, and edge inference circuits are presented with real measurement data rather than vendor claims. The 2027 theme is "Trusted Sustainable Silicon Intelligence From Edge to Cloud", which frames the edition explicitly around AI compute, its energy cost and its security. The programme is selected by eleven technical subcommittees and wrapped in tutorials, forums, a short course, demonstration sessions, a Student Research Preview and an exhibition. Papers are due 9 September 2026, with the Student Research Preview abstract deadline on 21 October 2026.

• Paper submission deadlineSep 9, 2026
• Student Research Preview abstract deadlineOct 21, 2026

Date

February 14–18, 2027

Location

San Francisco Marriott Marquis, California

Format

In-Person

Event Type

Conference

Status

Upcoming

Pricing

Paid

Organizer

IEEE Solid-State Circuits Society

Added

Aug 10, 2026

Updated

Aug 10, 2026

• ✓Silicon and circuit design engineers
• ✓AI hardware and accelerator architects
• ✓VPs of Engineering and CTOs at semiconductor companies
• ✓Data centre infrastructure and platform leads
• ✓Semiconductor investors and industry analysts
• ✓PhD students and academic researchers in circuits
• ✓Technology strategists at hyperscalers and OEMs

Anyone signing multi-year cheques for AI infrastructure should have someone in the room at ISSCC. This is where the next generation of accelerators, memory and power-delivery designs is disclosed with measured numbers eighteen to thirty-six months before it lands in a product you can buy, which is exactly the horizon on which data centre, edge and device roadmaps get committed. A CTO or head of infrastructure leaves able to distinguish a genuine efficiency step-change from a marketing slide, with a defensible view of where performance-per-watt is actually heading, and with contacts at the design teams behind the parts their capacity plan depends on.

• ✓Technical programme across eleven subcommittees: Analog Circuits; Data Converters; Digital Circuits, Architectures & Systems; Image Sensors & Displays; Medical; Memory; Power Management; RF Circuits & Wireless Systems; Security; Technology Directions; Wireline
• ✓Tutorials on foundational circuit and system design topics
• ✓Industry and technology Forums running alongside the main sessions
• ✓Short Course — an in-depth taught programme on a single theme
• ✓Demonstration Sessions showing working silicon
• ✓Student Research Preview poster programme
• ✓Exhibition of design tools, EDA vendors and semiconductor suppliers
• ✓2027 conference theme: "Trusted Sustainable Silicon Intelligence From Edge to Cloud"

• ★The results are measured, not simulated — ISSCC's defining rule is silicon with real measurement data, which makes it the only venue where AI-hardware performance claims can be checked rather than taken on trust.
• ★The 2027 theme, "Trusted Sustainable Silicon Intelligence From Edge to Cloud", puts AI compute, its power budget and its security at the centre of the whole programme rather than in a side track.
• ★Every major processor, memory and accelerator vendor discloses here first, which is why the conference is treated as an annual industry scoreboard by analysts and investors.
• ★Eleven technical subcommittees run parallel programmes, so an attendee can go deep on memory, power delivery or digital architecture rather than sampling a generalist agenda.
• ★The submission calendar is already published — papers 9 September 2026, Student Research Preview abstracts 21 October 2026 — so authors and sponsors can plan against real dates.

ISSCC 2027 registration rates have not been published yet — the call for papers is still open (papers due 9 September 2026) and registration normally opens after the programme is set. ISSCC charges separately for the conference, the Tutorials/Forums day and the Short Course, with IEEE/SSCS member and student discounts, but the 2027 figures are not available to quote.

When is ISSCC 2027?

ISSCC 2027 takes place February 14–18, 2027 in San Francisco, California.

Where is ISSCC 2027 held?

ISSCC 2027 is held in San Francisco, California. The event format is in-person.

What is the ISSCC 2027 submission deadline?

The next ISSCC 2027 deadline is paper submission deadline on Sep 9, 2026. Remaining dates: Student Research Preview abstract deadline — Oct 21, 2026.

How much does ISSCC 2027 cost?

ISSCC 2027 is paid. ISSCC 2027 registration rates have not been published yet — the call for papers is still open (papers due 9 September 2026) and registration normally opens after the programme is set. ISSCC charges separately for the conference, the Tutorials/Forums day and the Short Course, with IEEE/SSCS member and student discounts, but the 2027 figures are not available to quote.

Who should attend ISSCC 2027?

ISSCC 2027 is aimed at Silicon and circuit design engineers, AI hardware and accelerator architects, VPs of Engineering and CTOs at semiconductor companies, Data centre infrastructure and platform leads, Semiconductor investors and industry analysts, PhD students and academic researchers in circuits, Technology strategists at hyperscalers and OEMs.

What topics does ISSCC 2027 cover?

ISSCC 2027 covers AI accelerators and machine learning hardware, Semiconductors and integrated circuit design, Memory technology, Power management and energy efficiency, Edge AI and on-device inference, Hardware security and trusted silicon, Wireline and optical interconnect, RF and wireless systems.

This page was written from 3 sources, 2 on domains other than isscc.org.

1. 1.isscc.org — future conferencesvendor
2. 2.submissions.mirasmart.com — ISSCC2027CFP.pdf
3. 3.showsbee.com — IEEE ISSCC