Intel's new D-series GPU lets you hold a 300-billion-parameter model on one air-cooled PCIe card in a rack you already own. It reads that memory at only 1.5 TB/s, though, so a big dense model will answer one user at single-digit tokens per second. It is a capacity card. If your on-prem inference is limited by how much model and context you can fit, it is worth a quote. If it is limited by how fast each reply streams, it is the wrong part, and there is no price or ship date yet to argue with.
Intel published the specs on October 12 at the OCP Global Summit in San Jose. The D-series, formerly code-named Crescent Island, is built on the Xe3P architecture with "up to 480GB of LPDDR5X memory," 1.5 TB/s of memory bandwidth, 1.3 petaflops of FP8 compute and a 350-watt envelope, in a standard air-cooled PCIe card. Intel says it runs models of "up to 300 billion parameters on a single card" and more than a trillion on an eight-GPU system. Customer sampling is underway. Most of what you need to know sits in a footnote.
Which Card Is Intel Actually Selling?
The card Intel will sell under its own brand has 160GB, and 480GB is a ceiling for partner designs. The release's footnote says the Intel-branded PCIe card carries 160GB of LPDDR5X and that partners can build ODM-branded cards with options up to 480GB. The release names no partner, gives no price and no general availability date.
That footnote changes the headline claim. A 300B-parameter model at FP8 is roughly 300GB of weights, which fits only on a 480GB partner card. On Intel's own 160GB card, 300B fits only at about 4-bit precision (roughly 150GB), which leaves around 10GB for the KV cache, the per-conversation memory a model keeps for context it has already read. The release states no precision, batch size or context length for the 300B claim, and its only caveat is that "performance varies by use, configuration and other factors."
When Intel first announced Crescent Island in October 2025, it described 160GB of LPDDR5X, a design "power and cost-optimized for air-cooled enterprise servers," and customer sampling in the second half of 2026. Intel hit the sampling date. The capacity increase comes from partners.
If you are pricing this card, ask which SKU the quote is for before you compare it with anything.
Why Does 1.5 TB/s Matter More Than 480GB?
Bandwidth sets how fast one reply streams, because generating each token means reading the active weights out of memory once. Memory bandwidth is the rate at which a chip can move data from its memory into its compute units, and in single-stream decoding it is the ceiling on speed.
The arithmetic is simple and it's the part sales decks leave out. A dense 300B model at FP8 reads about 300GB per token. At 1.5 TB/s, that is a theoretical ceiling of about 5 tokens per second for one stream, before any overhead. At 4-bit, about 10. A person reads faster than that. An agent waiting on a long tool-calling chain notices it too.
Compare the cards an infrastructure team is likely to have quoted already:
| Card | Memory | Bandwidth | Board power | Cooling |
|---|---|---|---|---|
| Intel GPU D-series | 160GB (Intel card), up to 480GB (partner) LPDDR5X | 1.5 TB/s | 350W | Air, PCIe |
| AMD Instinct MI350P | 144GB HBM3E | 4 TB/s | 600W (450W mode) | Air, passive, PCIe |
| Nvidia RTX PRO 6000 Blackwell Server Edition | 96GB GDDR7 | 1.6 TB/s | 400-600W configurable | Passive, PCIe |
Sources: Intel; MI350P per The Register and ServeTheHome, May 7, 2026; RTX PRO 6000 per PNY's product page. None of the three vendors has published a price for these cards.
AMD's MI350P reads memory about 2.7 times faster, with 2.3 petaflops of MXFP8 per ServeTheHome's spec table, but at 144GB it cannot hold a 300B model at FP8 or at 4-bit. You need two of them, and The Register notes the cards have no high-speed interconnect, so card-to-card traffic runs at PCIe 5.0's 128 GB/s.
The steel-man for Intel is the Nvidia row. Many enterprises self-hosting in air-cooled racks are buying RTX PRO class cards, and the D-series matches their bandwidth within about 6% while a partner card carries five times the memory at 350W instead of up to 600W. Against the card you might actually buy, Intel gives up little speed and gains a great deal of room. Against an HBM card, it trades speed for room.
Two caveats are worth carrying into a vendor call: Wccftech's breakdown lists the 1.5 TB/s figure as an estimate tied to LPDDR5X-9600, and Intel's release does not say whether the 1.3 petaflops is dense or sparse.
Which Workloads Fit a Capacity Card?
The D-series fits workloads where memory runs out before bandwidth does: mixture-of-experts models, many concurrent sessions, and long context. Intel's own target list says the same, naming "long-context workloads and concurrent inference services" and "multi-tenant AI services."
Mixture-of-experts (MoE) models. An MoE model stores many expert sub-networks but runs only a few per token, so every parameter must be resident while only the active ones are read. A hypothetical MoE with 30B active parameters at FP8 reads about 30GB per token, a ceiling near 50 tokens per second on 1.5 TB/s, while its full weights can sit in 480GB. We worked through this total-versus-active gap in Tencent's 770B model that activates 49B. Many concurrent agents. Batching lets many streams share one read of the weights per step, so total throughput climbs with concurrency until compute or KV cache runs out. On this card, the extra memory is where those KV caches live. A fleet of internal agents that each tolerate a few seconds of latency is the workload Intel is describing. Our batch-size piece shows how fast a headline tokens-per-second figure falls once context and batch grow.
Long context. A 100K-token context on a large model can need tens of gigabytes of KV cache per session. Capacity decides how many of those you can keep warm.
Where it loses: a single user waiting on a large dense model, interactive coding assistants on frontier-size dense weights, and anything where time-to-first-token and streaming speed are the product.
The model Intel chose to showcase sits oddly against this pitch. The release promises Day 0 support for Meta's Muse Glimmer, a model that clears agentic tool-calling benchmarks on a 24GB GPU. It says nothing about the 300B-class MoE models that would actually need 480GB.
What Happened the Last Time Intel Sold an AI Accelerator?
Intel's last two data-center AI accelerators stalled on software and roadmap, which is the risk to price in here. In November 2024 Intel said it would miss its $500 million Gaudi 3 sales goal, citing software issues, and few major providers beyond IBM had committed. In January 2025 it said Falcon Shores would become "an internal test chip, without bringing it to market," and moved its focus to the rack-scale Jaguar Shores.
The D-series release describes "a common Xe software foundation" and portability across Intel GPU platforms. It does not name vLLM, SGLang or any serving runtime. For most teams self-hosting today, vLLM is the default runtime. If your runtime does not support the card well, the hardware savings go to engineers porting kernels.
The memory itself is the second risk. LPDDR5X is what makes the card cheap to build, and its price has been moving fast: TrendForce forecast on February 2, 2026 that LPDDR5X contract prices would rise around 90% quarter over quarter in 1Q26. A 480GB partner card carries three times the LPDDR5X of Intel's own, so the price gap between SKUs may be wider than the capacity math suggests. We covered how DRAM pricing is already moving server BOMs.
What Should You Do Before the Quote Arrives?
Sort your planned on-prem workloads into capacity-bound and bandwidth-bound now, so you can read Intel's price the day it lands. The sorting takes an afternoon and uses numbers you already have.
This Week:
- List every model you plan to self-host in 2027 with its total parameters, active parameters and the precision you will run. Divide active-parameter bytes into 1.5 TB/s and into 4 TB/s. Any model that lands under about 15 tokens per second per stream on the D-series is a bandwidth workload; mark it.
- Pull your latency requirement for each use case from the product owner, in tokens per second per user and time-to-first-token, and write it next to the model. Batch back-office agents and interactive chat do not belong on the same card.
- Check which precision your quality evals actually tolerate. Fitting 300B on a 160GB card means 4-bit, and our quantization comparison shows the accuracy cost differs by model.
This Month:
- Ask Intel or your OEM five questions in writing: which SKU and memory size the quote covers; the precision, batch size and context length behind "300 billion parameters on a single card"; whether 1.3 petaflops is dense or sparse; which vLLM or SGLang release supports the card and when; and the general availability date.
- Ask your server OEM whether a 350W PCIe card fits your current chassis airflow and power per slot. Eight cards are about 2.8kW of accelerator power, against roughly 4.8kW for eight 600W cards, and that gap is the whole reason to look at this part if you have no liquid cooling.
- Get a sampling unit or a hosted test slot, and run your own capacity-bound workload on it at your real concurrency. Measure aggregate tokens per second at the latency target from step 2, not peak single-stream speed.
Before 2027 Capex Lock:
- Price the D-series against two MI350Ps and against RTX PRO 6000 nodes on cost per concurrent session at your latency target, the metric that matches what the card is built for.
The Bigger Picture
Inference hardware is starting to split into tiers the way storage arrays did, with capacity and speed bought separately. HBM cards are the speed tier, and they need the power and often the liquid cooling that many enterprise data centers lack. Intel is pitching LPDDR5X as the capacity tier for the racks you already have. That is a real category, and an air-cooled 480GB card at 350W has no direct equivalent in the table above.
Whether Intel can sell into it depends on software support, a price that survives the LPDDR5X market, and a ship date, and Intel published none of the three on Monday. Nic Dubé's OCP keynote is today, October 13, at 10:30 a.m. PT. Have your capacity-bound and bandwidth-bound lists ready before it starts.
Continue Reading
- Tencent Says 49B Active. Your Node Loads All 770B.
- 3,400 Tokens/s Was Batch 1. At 100K Context, It's Batch 12.
- FP8 vs NVFP4 vs INT4-AWQ: AWQ Outran NVFP4 on 3 of 4 Models
- AMD's Inference Discount Depends on a GPU You Can't Rent
- Best Air-Gapped LLM Stack: Apache Weights on vLLM Beat NVIDIA's Fee
- When the Colo's Chillers Fail, the GPU Loss Is Yours